Alif Semiconductor /AE302F80F55D5AE_CM55_HP_View /USB /DEVTEN

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Interpret as DEVTEN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISSCONNEVTEN)DISSCONNEVTEN 0 (USBRSTEVTEN)USBRSTEVTEN 0 (CONNECTDONEEVTEN)CONNECTDONEEVTEN 0 (ULSTCNGEN)ULSTCNGEN 0 (WKUPEVTEN)WKUPEVTEN 0 (HIBERNATIONREQEVTEN)HIBERNATIONREQEVTEN 0 (U3L2L1SUSPEN)U3L2L1SUSPEN 0 (SOFTEVTEN)SOFTEVTEN 0 (L1SUSPEN)L1SUSPEN 0 (ERRTICERREVTEN)ERRTICERREVTEN 0 (VENDEVTSTRCVDEN)VENDEVTSTRCVDEN 0 (L1WKUPEVTEN)L1WKUPEVTEN 0 (ECCERREN)ECCERREN

Description

Device Event Enable Register

Fields

DISSCONNEVTEN

Disconnect Detected Event Enable.

USBRSTEVTEN

USB Reset Enable.

CONNECTDONEEVTEN

Connection Done Enable.

ULSTCNGEN

USB/Link State Change Event Enable.

WKUPEVTEN

L2 or L2L1 Resume Detected Event Enable. Note:

  1. If the GUCTL1[DEV_DECOUPLE_L1L2_EVT] bit is enabled, then this bit is for L2 Resume Detected Event Enable.
  2. If the GUCTL1[DEV_DECOUPLE_L1L2_EVT] bit is not enabled, then this bit is for L2L1 Resume Detected Event Enable.
HIBERNATIONREQEVTEN

This bit enables/disables the generation of the Hibernation Request Event.

U3L2L1SUSPEN

L2 or L2L1 Suspend Event Enable. Note:

  1. If the GUCTL1[DEV_DECOUPLE_L1L2_EVT] bit is enabled, then this bit is for L2 Suspend Event Enable.
  2. If the GUCTL1[DEV_DECOUPLE_L1L2_EVT] bit is not enabled, then this bit is for L2L1 Suspend Event Enable.
SOFTEVTEN

Start of (micro)frame.

L1SUSPEN

L1 Suspend Event Enable Note: Only if the GUCTL1[DEV_DECOUPLE_L1L2_EVT] bit is enabled, this bit is for L1 Suspend Event Enable.

ERRTICERREVTEN

Erratic Error Event Enable.

VENDEVTSTRCVDEN

Vendor Device Test LMP Received Event

L1WKUPEVTEN

L1 Resume Detected Event Enable. Note: If the GUCTL1[DEV_DECOUPLE_L1L2_EVT] bit is enabled, then this bit is for L1 Resume Detected Event Enable.

ECCERREN

ECC Error Enable. If this bit is set to 0x1, the controller reports an ECC error to the software when an uncorrectable ECC occurs internally.

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